Verification Process of Hardware Design in Liberouter Project

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Authors

HOLEČEK Jan KRATOCHVÍLA Tomáš ŘEHÁK Vojtěch ŠAFRÁNEK David ŠIMEČEK Pavel

Year of publication 2004
Type R&D Presentation
MU Faculty or unit

Faculty of Informatics

Citation
Description This technical report analyzes the process of verification of hardware design in Liberouter project. Such an analysis had become a necessity since we had developed several tools that were difficult both to maintain and modify. This document tries to sum up our needs and to propose a way our tools could be organized. Description of verification environment Verunka is given in more detail as it is a new tool.
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