Routing, L2 Addressing, and Packet Filtering in a Hardware Engine
| Authors | |
|---|---|
| Year of publication | 2006 |
| Type | Article in Proceedings |
| Conference | Proceedings of MEMICS 2006 |
| MU Faculty or unit | |
| Citation | |
| Field | Computer hardware and software |
| Keywords | routing; L2 addressing; packet filtering; hardware packet classification |
| Description | To improve throughput of personal computers used as Internet routers, hardware acceleration can be used. Packet classification unit employed in the design utilizes content addressable memory combined with comparison instructions. Routing, link layer addressing, and packet filtering has to be performed in a single operation. We have developed a representation of the first two called routing-ARP table, and representation of filters based on decision diagrams. In this paper, we describe a method to combine them all together and convert the resulting structure into the hardware device. As a special case, the algorithm converts a decision diagram into a first-match structure. Dealing with implementation and limited hardware resources is mentioned. |
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